Integrated circuit with restricted data access

A computing circuit, comprising:

• a buffer configured to associate a virtual address of a program instruction with an actual address of the program instruction, and configured to store a flag having a first value if the actual address is a valid address and having a second value if the actual address is an invalid address;
• a processor coupled to the buffer and configured to initiate a fetch of the program instruction by providing the virtual address to the buffer;
• a fetch unit coupled to the buffer and configured to fetch the program instruction from the actual address if the flag has the first value and to generate a first exception indicator if the flag has the second value;
• and
• a data unit separate from and coupled to the fetch unit and to the processor and configured to retrieve the data from the data address if the program instruction is within an instruction range associated with the data address, and to generate a second exception indicator if the program instruction is outside of the instruction range.

A system, comprising:

• a first circuit, comprising
• a buffer configured to associate a virtual address of a program instruction with an actual address of the program instruction, and configured to store a flag having a first value if the actual address is a valid address and having a second value if the actual address is an invalid address,
• a processor coupled to the buffer and configured to initiate a fetch of the program instruction by providing the virtual address to the buffer, and
• a fetch unit coupled to the buffer and configured to fetch the program instruction from the actual address if the flag has the first value and to generate a first exception indicator if the flag has the second value;
• and
• a data unit separate from and coupled to the fetch unit and to the processor and configured to retrieve the data from the data address if the program instruction is within an instruction range associated with the data address, and to generate a second exception indicator if the program instruction is outside of the instruction range;
• and
• a second circuit coupled to the first circuit.

A method, comprising:

• initiating a fetch of a program instruction from an actual address via a virtual address;
• determining at a first check whether the actual address is a valid program-instruction address by checking a flag stored in a separate secure memory;
• determining at a second check whether the program instruction is within a group of instructions allowed to request the data;
• fetching the program instruction from the actual address if the actual address is a valid program-instruction address and if the program instruction is within a group of instructions allowed to request the data;
• and
• generating a first error indicator if the actual address is not a valid program-instruction address such that a circuit is prevented from fetching the program instruction.

A computing circuit, comprising:

• a processor configured to initiate a fetch of a program instruction that includes a request of data from a data address;
• a fetch unit coupled to the processor and configured to fetch the program instruction if the program instruction is flagged as valid in a separate flag store;
• and
• a data unit coupled to the fetch unit and to the processor and configured to retrieve the data from the data address if the program instruction is within an instruction range associated with the data address, and to generate an exception if the program instruction is outside of the instruction range.

A system, comprising:

• a first circuit, comprising
• a processor configured to initiate a fetch of a program instruction that includes a request of data from a data address,
• a fetch unit coupled to the processor and configured to fetch the program instruction if the program instruction is flagged as valid in a separate flag store, and
• a data unit coupled to the fetch unit and to the processor and configured to retrieve the data from the data address if the program instruction is within an instruction range associated with the data address, and to generate an exception if the program instruction is outside of the instruction range;
• and
• a second circuit coupled to the first circuit.

A method, comprising:

• fetching a program instruction flagged as valid in a separate flag store that includes a request of data from a data address;
• retrieving the data from the data address and storing the data in a memory if the program instruction is within an instruction range associated with the data address;
• and
• generating an error indicator if the program instruction is outside of the instruction range such that the data is prevented from being stored in the memory.