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US 8,751,745 B2Granted
Method for concurrent flush of L1 and L2 caches
AssigneeAdvanced Micro Devices, Inc.
InventorsRobert Krick, David Kaplan
Life of this patent
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Abstract
The present invention provides a method and apparatus for use with a hierarchical cache system. The method may include concurrently flushing one or more first caches and a second cache of a multi-level cache. Each first cache is smaller and at a lower level in the multi-level cache than the second level cache.
Claims12
A method, comprising:
- concurrently flushing at least one first cache and a second cache of a multi-level cache of a processor, wherein each first cache is smaller and at a lower level in the multi-level cache than the second cache, and wherein concurrently flushing comprises:
- flushing a single way of the second cache using hardware in response to a signal provided by microcode, wherein the second cache includes N ways;
- and
- flushing a number of lines of said at least one first cache using the microcode, wherein the number corresponds to 1/N of the lines.
1 more element
A multi-level cache, comprising:
- at least one first cache and a second cache, wherein each first cache is smaller and at a lower level in the multi-level cache than the second cache, and wherein the second cache includes N ways;
- and
- a cache controller configured to control concurrent flushing of said at least one first cache and the second cache, wherein the cache controller is to control the concurrent flushing to flush only those ways of said at least one first cache and said second cache that include valid data, and wherein the cache controller is to control concurrent flushing by:
- providing a signal to hardware to initiate flushing a selected portion or combination of ways of the second cache;
- and
- flushing 1/N of lines of said at least one first cache using microcode.
3 more elements
Dependencies are inferred from the claim text.