Host channel adapter with pattern-type DMA
AssigneeMellanox Technologies, Ltd.
InventorsAriel Shahar, Noam Bloch, Adi Fuchs
Life of this patent
Estimating the term…
Abstract
An input/output (I/O) device includes a memory buffer and off-loading hardware. The off-loading hardware is configured to accept from a host a scatter/gather list including one or more entries. The entries include at least a pattern-type entry that specifies a period of a periodic pattern of addresses that are to be accessed in a memory of the host. The off-loading hardware is configured to transfer data between the memory buffer of the I/O device and the memory of the host by accessing the addresses in the memory of the host in accordance with the periodic pattern at intervals indicated in the period.
Claims22
An input/output (I/O) device, comprising:
- a memory buffer;
- and
- off-loading hardware, which is configured to accept from a host a scatter/gather list comprising one or more entries, including at least a pattern-type entry that specifies a period of a two or more periodic patterns of addresses nested in one another, which are to be accessed in a memory of the host, and to transfer data between the memory buffer of the I/O device and the memory of the host by accessing the addresses in the memory of the host in accordance with the periodic patterns at intervals indicated in the period.
A method, comprising:
- in an input/output (I/O) device, accepting from a host a scatter/gather list comprising one or more entries, including at least a pattern-type entry that specifies a period of a two or more periodic patterns of addresses nested in one another, which are to be accessed in a memory of the host;
- and
- transferring data between the I/O device and the memory of the host by accessing the addresses in the memory of the host in accordance with the periodic patterns at intervals indicated in the period.
Dependencies are inferred from the claim text.