Processor for large graph algorithm computations and matrix operations

A multiprocessor system for performing sparse matrix operations, comprising:

• a communications network;
• and
• a plurality of node processors in communication with the communications network, the plurality of node processors operating concurrently to perform a matrix operation that operates with first and second sparse matrices to produce a sparse results matrix, each node processor comprising,
• memory to store the non-zero matrix elements of the first sparse matrix and the non-zero matrix elements of the second sparse matrix distributed to that node processor and to store matrix elements of the sparse results matrix mapped to that node processor;
• means for receiving, over the communications network from the other node processors, one or more non-zero matrix elements of the first sparse matrix that had been distributed to those other node processors;
• and
• an arithmetic logic unit to generate, in accordance with the matrix operation, partial results based on the non-zero matrix elements of the first sparse matrix received by that node processor from the other node processors and on the non-zero matrix elements of the second matrix distributed to that node processor;
• wherein the receiving means receives, over the communications network from the other node processors, the partial results generated by the other node processors and associated with the matrix elements of the sparse results matrix mapped to that node processor;
• and
• wherein the arithmetic logic unit generates a final value for each matrix element of the sparse results matrix mapped to that node processor based on the partial results generated by that node processor and on the partial results received from the other node processors associated with that matrix element of the sparse results matrix.