Dual mode power amplifier control interface with a three-mode general purpose input/output interface

A digital control interface comprising:

• a voltage input/output (VIO) pin configured to receive a VIO signal, the VIO signal corresponding to one of a first logic level and a second logic level;
• a clock/mode pin configured to receive a first signal corresponding to one of the first logic level and the second logic level;
• a data/mode pin configured to receive a second signal corresponding to one of the first logic level and the second logic level;
• a general purpose input/output (GPIO) interface module, the GPIO interface module including an enable level shifter, a first mode level shifter, a second mode level shifter, and a combinational logic block, the combinational logic block configured to provide an enable signal to the enable level shifter for output to a power amplifier controller, the combinational logic block further configured to provide a first mode signal to the first mode level shifter for output to the power amplifier controller and a second mode signal to the second mode level shifter for output to the power amplifier controller, the enable signal corresponding to an enable logic value when one or more of the first signal and the second signal correspond to the first logic level and the VIO signal corresponds to the second logic level, the first mode signal corresponding to the first signal and the second mode signal corresponding to the second signal when the VIO signal corresponds to the second logic level, and the power amplifier controller configured to control a power amplifier based, at least in part, on the first mode signal and the second mode signal;
• and
• a serial interface module, the serial interface module including a serial interface core and a reset logic block, the serial interface core configured to provide a serial interface when the VIO signal corresponds to the first logic level, the reset logic block configured to place the serial interface core into a reset mode when the VIO signal corresponds to the second logic level.

A method for providing multiple control interfaces in a digital control interface comprising a GPIO interface module and a serial interface module including a serial interface core, the method comprising:

• receiving a VIO signal at a VIO input to the digital control interface;
• determining whether the VIO signal corresponds to a logic high value;
• in response to determining that the VIO signal corresponds to the logic high value, configuring the digital control interface to function as a serial interface by providing a clock signal from a clock input to the serial interface core, providing a data signal from a data input to the serial interface core, and selecting, at a combinational logic block, a first enable signal to output to an enable level shifter, a first mode signal to output to a first mode level shifter, and a second mode signal to output to a second mode level shifter, the first enable signal, the first mode signal, and the second mode signal received from a serial interface core;
• and
• in response to determining that the VIO signal corresponds to a logic low value, configuring the digital control interface to function as a general purpose input/output (GPIO) interface by providing a first input signal and a second input signal to the combinational logic block, and selecting, at the combinational logic block, a second enable signal to output to the enable level shifter, a third mode signal to output to the first mode level shifter, and a fourth mode signal to output to the second mode level shifter, the second enable signal based on a logical operation of the first input signal and the second input signal, the third mode signal based, at least in part, on the first input signal, and the fourth mode signal based, at least in part, on the second input signal.

A power amplifier module comprising:

• a digital control interface;
• a power amplifier;
• a power amplifier controller;
• a mode selector configured to provide a VIO signal to the digital control interface, the VIO signal configured to set the mode of a digital control interface, the VIO signal corresponding to one of a first logic level and a second logic level;
• the digital control interface including:
• a voltage input/output (VIO) pin configured to receive the VIO signal;
• a clock/mode pin configured to receive a first signal corresponding to one of the first logic level and the second logic level;
• a data/mode pin configured to receive a second signal corresponding to one of the first logic level and the second logic level;
• a general purpose input/output (GPIO) interface module, the GPIO interface module including an enable level shifter, a first mode level shifter, a second mode level shifter, and a combinational logic block, the combinational logic block configured to provide an enable signal to the enable level shifter for output to the power amplifier controller, the combinational logic block further configured to provide a first mode signal to the first mode level shifter for output to the power amplifier controller and a second mode signal to the second mode level shifter for output to the power amplifier controller, the enable signal corresponding to an enable logic value when one or more of the first signal and the second signal correspond to a first logic level and the VIO signal corresponds to the second logic level, the first mode signal corresponding to the first signal and the second mode signal corresponding to the second signal when the VIO signal corresponds to the second logic level;
• and a serial interface module, the serial interface module including a serial interface core and a reset logic block, the serial interface core configured to provide a serial interface when the VIO signal corresponds to the first logic level, the reset logic block configured to place the serial interface core into a reset mode when the VIO signal corresponds to the second logic level;
• and
• the power amplifier controller configured to receive the enable signal from the enable level shifter, the first mode signal from the first mode level shifter, and the second mode signal from the second mode level shifter, and to control the power amplifier by providing a control signal to the power amplifier based, at least in part, on the first mode signal and the second mode signal, the control signal specifying a mode of operation of the power amplifier.