System and method for determination of a horizontal minimum of digital values

A system for fast determination of a horizontal minimum of a plurality of digital values, comprising:

• a plurality of difference circuits, each configured to compare a first digital value with a second digital value;
• a routing circuit which is configured to route each of the plurality of digital values to at least one of said plurality of difference circuits in order to compare each digital value with every other one of the plurality of digital values;
• wherein each of said plurality of difference circuits comprises:
• an upper adder configured to compare an upper portion of a first digital value with an upper portion of a second digital value and to provide a corresponding one of a plurality of first carry outputs and a corresponding one of a plurality of propagate outputs;
• and
• a lower adder configured to compare a lower portion of said first digital value with a lower portion of said second digital value and to provide a corresponding one of a plurality of second carry outputs;
• and
• a compare circuit which is configured to combine said plurality of first and second carry outputs and said plurality of propagate outputs to determine a minimum one of the plurality of digital values, wherein said compare circuit comprises:
• a first compare circuit which is configured to combine a first carry output, a second carry output and a propagate output of each of said plurality of difference circuits to provide a corresponding one of a plurality of comparison bits;
• and
• a second compare circuit which is configured to determine a minimum one of the plurality of digital values based on said plurality of comparison bits.

A method of determining a minimum one of a plurality of digital values, comprising:

• comparing, by a microprocessor, upper bits of a first digital value with upper bits of a second digital value and providing a first carry output and a propagate output;
• comparing, by the microprocessor, lower bits of the first digital value with lower bits of the second digital value and providing a second carry output;
• and
• determining, by the microprocessor, which of the first and second digital values is a lesser value based on the first and second carry outputs and the propagate output;
• wherein said comparing upper bits, comparing lower bits and determining being performed by each of a plurality of adder pairs of the microprocessor;
• routing, by the microprocessor, each of a plurality of digital values to at least one of the plurality of adder pairs for comparing each digital value with every other one of the plurality of digital values;
• and
• determining, by the microprocessor, a minimum one of the plurality of digital values based on said comparing.

A microprocessor which is configured to determine a minimum one of at least two binary values, comprising:

• a first adder which is configured to add upper bits of a first binary value with inverted upper bits of a second binary value, said first adder configured to provide a first carry output and a first propagate output;
• a second adder which is configured to add lower bits of said first binary value with inverted lower bits of said second binary value, said second adder configured to provide a second carry output;
• and
• a compare circuit which is configured to determine whether said first binary value is greater than said second binary value based on said first and second carry outputs and said first propagate output, wherein said compare circuit comprises:
• an OR gate having first and second inputs and an output, wherein said first input receives said first carry output and said output indicates whether said first binary value is greater than said second binary value;
• and
• an AND gate having first and second inputs and an output, wherein said first input receives said propagate output, wherein said second input receives said second carry output, and wherein said output is coupled to said second input of said OR gate.