Lateral silicon controlled rectifier structure
AssigneeUnited Microelectronics Corp.
InventorsTa-Cheng Lin, Te-Chang Wu
Life of this patent
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Abstract
A lateral silicon controlled rectifier structure includes a P-type substrate; an N-well region in the P-type substrate; a first P+ doped region in the N-well region and being connected to an anode; a P-well region in the P-type substrate and bordering upon the N-well region; a first N+ doped region formed in the P-well region and separated from the first P+ doped region by a spacing distance, the first N+ doped region being connected to a cathode; and a gate structure overlying a portion of the P-type substrate between the first P+ doped region and the first N+ doped region.
Claims14
A lateral silicon controlled rectifier structure, comprising:
- a P-type substrate;
- an N-well region formed in the P-type substrate;
- a first P+ doped region formed in the N-well region and being directly connected to an anode;
- a P-well region formed in the P-type substrate and bordering upon the N-well region;
- a first N+ doped region formed in the P-well region and separated from the first P+ doped region by a spacing distance, the first N+ doped region being directly connected to a cathode;
- a gate structure overlying a portion of the P-type substrate between the first P+ doped region and the first N+ doped region, wherein the gate structure is right above a junction formed between the N-well region and the P-well region;
- a second N+ doped region formed in the N-well region, the second N+ doped region being directly connected to the anode and electrically coupled to the first P+ doped region;
- and
- a second P+ doped region formed in the P-well region, the second P+ doped region being directly connected to a cathode and electrically coupled to the first N+ doped region.
A lateral silicon controlled rectifier structure, comprising:
- a P-type substrate;
- an N-well region formed in the P-type substrate;
- a first P+ doped region formed in the N-well region and being directly connected to an anode;
- a P-well region formed in the P-type substrate and bordering upon the N-well region;
- a first N+ doped region formed in the P-well region and separated from the first P+ doped region by a spacing distance, the first N+ doped region being directly connected to a cathode;
- a gate structure overlying a portion of the P-type substrate between the first P+ doped region and the first N+ doped region, wherein the gate structure is right above a junction formed between the N-well region and the P-well region;
- a second N+ doped region formed in the N-well region, separated from the first P+ doped region with a first electrical isolation structure, the second N+ doped region being directly connected to the anode and electrically coupled to the first P+ doped region;
- and
- a second P+ doped region formed in the P-well region, separated from the first N+ doped region with a second electrical isolation structure, the second P+ doped region being directly connected to a cathode and electrically coupled to the first N+ doped region.
Dependencies are inferred from the claim text.