Producing transistor including single layer reentrant profile
AssigneeEastman Kodak Company
InventorsShelby F. Nelson, Lee W. Tutt
Life of this patent
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Abstract
A method of producing a transistor includes providing a substrate including a first electrically conductive material layer. A resist material layer is deposited over the first electrically conductive material layer. The resist material layer is patterned to expose a portion of the first electrically conductive material layer. Some of the first electrically conductive material layer is removed to create a reentrant profile in the first electrically conductive material layer and expose a portion of the substrate. The first electrically conductive material layer and at least a portion of the substrate are conformally coated with an electrically insulating material layer.
Claims7
A method of producing a transistor comprising:
- providing a substrate including in order a first electrically conductive material layer;
- depositing a resist material layer over the first electrically conductive material layer;
- patterning the resist material layer to expose a portion of the first electrically conductive material layer;
- removing some of the first electrically conductive material layer to create a reentrant profile on opposing sides of the first electrically conductive material layer to form a gate and to expose a portion of the substrate;
- and
- conformally coating the first electrically conductive material layer, and at least a portion of the substrate with an electrically insulating material layer, the electrically insulating material layer conforming to the reentrant profile of the first electrically conductive material layer and having a uniform thickness at least in the region where the reentrant profile and the gate are located;
- conformally coating the electrically insulating material layer with a semiconductor material layer;
- and
- directionally and nonconformally depositing discontinuous portions of a second electrically conductive material layer to form discrete source and drain electrodes that are positioned on and in contact with different regions of the semiconductor material layer.
Dependencies are inferred from the claim text.