Reconfigurable dynamic logic gate with linear core
AssigneeInstituto Potosino de Investigación Científica y Tecnológica A.C.
InventorsEric Campos Canton, Isaac Campos Canton, Haret Codratian Rosu
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Abstract
A dynamically reconfigurable linear core logic gate is a device that allows logical outputs dependent upon configurable parameters set within device. The device is comprised of three blocks: The first block receives at least one input signal and determines whether the signal or signals are low or high in comparison with a threshold reference signal. The second block sums the logic signals of the first block with an offset signal. The third block determines if the sum realized in the second block is a low or high by checking whether the sum falls within a predetermined interval.
Claims11
A reconfigurable dynamic logic gate with linear core comprising:
- one input block;
- one summation block;
- and
- an output block with at least one threshold reference signal and at least one offset signal to determine the behavior of the device as different basic logic gates.
A reconfigurable dynamic logic gate comprising:
- an input comparator for receiving a first input signal and a second input signal to generate an output for each input signal, wherein if each input signal is greater that certain threshold then its output is a high logic state otherwise is a low logic state;
- a summation block which combined an inverting summation and a noninverting summation circuit, wherein the summation has three inputs and one output;
- the two outputs of the input block are the inputs of the inverting summation and an offset signal to select the different logic gates is the input of the noninverting summation, and the output of the summer is the offset signal minus the adding of the outputs of the input bloc;
- and
- an output block which checked if the output signal of the summation block belongs to an interval or not compared to one threshold reference signal, wherein if the input signal belongs to the interval the output of the reconfigurable dynamic logic gate is a high logic state, otherwise is a low logic state.
Dependencies are inferred from the claim text.