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US 8,575,679 B2Granted
Nonvolatile semiconductor memory device
AssigneeSeiko Instruments Inc.
InventorHiroaki Takasu
Life of this patent
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Abstract
Provided is an electrically erasable and programmable nonvolatile semiconductor memory device having a tunnel region; the tunnel region and the peripheral of the tunnel region are dug down to be made lower, and a depletion electrode, to which an arbitral potential is given to deplete a part of the tunnel region through a depletion electrode insulating film, is arranged in the lowered drain region.
Claims5
an electrically erasable and programmable nonvolatile semiconductor memory device, comprising:
- a first conductivity-type semiconductor substrate;
- a second conductivity-type source region and a drain region disposed apart to face each other on a surface of the semiconductor substrate;
- a channel formation region sandwiched by the source region and the drain region, formed on the surface of the semiconductor substrate;
- a floating gate electrode disposed on a gate insulating film over the source region, the drain region and the channel region;
- a control gate electrode disposed on a control insulating film over the floating gate electrode and capacitively coupled to the floating gate electrode;
- a tunnel region disposed in a part of the drain region;
- and
- a tunnel insulating film disposed between a surface of the tunnel region and the floating gate electrode;
- wherein the tunnel region and a peripheral region around the tunnel region is made lower, and a depletion electrode, to which a predetermined potential is given to deplete a part of the tunnel region through a depletion electrode insulating film, is arranged in a lowered drain.
6 more elements
Dependencies are inferred from the claim text.