Method of forming an extremely thin semiconductor insulator (ETSOI) FET having a stair-shaped raised source/drain

A method of forming an ETSOI semiconductor device comprising:

• providing a substrate comprising at least a semiconductor layer atop a dielectric layer, wherein the semiconductor layer has a thickness of less than 10 nm;
• forming isolation regions through the semiconductor layer into contact with the dielectric layer to define at least a first surface of the semiconductor layer and a second surface of the semiconductor layer;
• forming a gate structure on a portion of the first surface of the semiconductor layer, wherein a remaining portion of the first surface is exposed;
• epitaxially growing a single crystal semiconductor material on the remaining portion of the first surface and the second surface of the semiconductor layer, wherein the single crystal semiconductor material on the remaining portion of the first surface provides a raised source region and a raised drain region of a semiconductor device, and the single crystal semiconductor material on the second surface provides an upper surface of a resistor;
• forming a dielectric layer on a portion of the upper surface of the resistor, wherein end portions of the upper surface of the resistor are exposed;
• and
• forming semiconductor metal alloy contacts on at least the end portions of the upper surface of the resistor and an upper surface of the raised source region and the raised drain region of the semiconductor device.