Generating properties for circuit designs
AssigneeJasper Design Automation, Inc.
InventorsClaudionor José Nunes Coelho, Jr., Fabiano Cruz Peixoto
Life of this patent
Estimating the term…
Loading patent…
AssigneeJasper Design Automation, Inc.
InventorsClaudionor José Nunes Coelho, Jr., Fabiano Cruz Peixoto
Estimating the term…
An analysis tool that generates properties for a circuit design. The debugging tool receives a circuit design encoded in a hardware description language. The tool identifies portions of the circuit design that correspond to features of interest (e.g., counters, finite state machines, one hot vectors, etc) in the circuit design. Each portion of the circuit design has a cone of influence, and the tool identifies control signals from within the cones of influence. By identifying control signals in this manner, the tool can then generate the properties based on values for the control signals and the identified portions of the circuit design that are obtained from data describing the operation of the circuit design over a number of clock cycles (e.g., simulation data). The result is one or more properties that are likely to represent a relevant behavior of the circuit design.
A computer program product for generating circuit design properties, the computer program product comprising a non transitory computer-readable storage medium containing computer program code for:
A computer-implemented method for generating circuit design properties, the method comprising:
Dependencies are inferred from the claim text.