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US 8,572,421 B2Granted
Adjusting device performance based on processing profiles
AssigneeApple Inc.
InventorsJosh P. de Cesare, Jonathan J. Andrews
Life of this patent
Estimating the term…
Abstract
Adjusting processor performance based on processing profiles. The method may determine that a process has entered a processing state after an idle state. In response to entering the processing state the processing time of the processor may be monitored. In response to the processing time exceeding a first threshold of time, the performance of the processor may be increased from a first level to a second level. In response to the processing time exceeding a second threshold time, the performance of the processor may be decreased from the second level to a third level.
Claims26
A method for controlling a processing level of a processor of a device, comprising:
- determining that the processor has entered a processing state after an idle state, wherein the processor initially operates at a first processing level in the processing state;
- in response to the processor entering the processing state, monitoring processing time of the processor since entering the processing state;
- in response to the processing time exceeding a first threshold of time, increasing the processing level of the processor to a second processing level that is greater than the first processing level;
- in response to the processing time exceeding a second threshold of time that is greater than the first threshold of time, decreasing the processing level of the processor to a third processing level that is less than the second processing level but greater than the first processing level, wherein the second processing level is not a sustainable processing level, wherein the first processing level and the third processing level are sustainable processing levels.
1 more element
A system for controlling processor performance, comprising:
- one or more processors;
- a power manager circuit coupled to the one or more processors, wherein the power manager circuit is configured to control a voltage level of the one or more processors;
- one or more memory mediums coupled to the one or more processors, wherein the one or more memory mediums store program instructions executable by at least one of the one or more processors to:
- determine that at least a first processor of the one or more processors has exited an idle state;
- in response to the first processor exiting the idle state, monitor processing time of at least the first processor since existing the idle state;
- in response to the processing time exceeding a first threshold of time, provide a first signal to the power manager circuit, wherein, in response to the first signal, the power manager circuit is configured to increase the voltage level of at least the first processor from a first voltage level to a second voltage level;
- and
- in response to the processing time exceeding a second threshold of time that is greater than the first threshold of time, provide a second signal to the power manager circuit, wherein, in response to the second signal, the power manager circuit is configured to decrease the voltage level of at least the first processor from the second voltage level to a third voltage level, wherein the third voltage level is greater than the first voltage level, and wherein the second threshold of time is based on a desired performance characteristic of applications executing on the one or more processors.
5 more elements
A non-transitory, computer-accessible memory medium storing program instructions for controlling a processing level of a circuit, wherein the program instructions are executable to:
- determine that the circuit has entered a processing state after an idle state, wherein the circuit initially operates at a first processing level in the processing state;
- in response to the circuit entering the processing state, monitor processing time of the circuit since entering the processing state;
- in response to the processing time exceeding a first threshold of time, increase the processing level of the circuit to a second processing level that is greater than the first processing level, wherein the second processing level is above a sustainable processing level;
- in response to the processing time exceeding a second threshold of time that is greater than the first threshold of time, decrease the processing level of the circuit to a third processing level that is less than the second processing level but greater than the first processing level, wherein the third processing level is a sustainable processing level.
1 more element
A method for controlling performance of one or more processors, comprising:
- generating a plurality of processing profiles for each of a plurality of applications executing on the one or more processors;
- analyzing the plurality of processing profiles to determine a first threshold of time, wherein the first threshold of time is greater than a processing time required by applications with low processing requirements of the plurality of applications;
- determining a second threshold of time based on a desired frame rate of applications executing on the one or more processors;
- wherein the first threshold of time is used to increase processing performance once the first threshold of time is reached after entering a processing state;
- wherein the second threshold of time is used to decrease processing performance once the second threshold of time is reached after entering the processing state.
2 more elements
A method for controlling a processing level of a processor of a device, comprising:
- determining that the processor has entered a processing state after an idle state, wherein the processor initially operates at a first processing level in the processing state;
- in response to the processor entering the processing state, monitoring processing time of the processor since entering the processing state;
- in response to the processing time exceeding a first threshold of time, increasing the processing level of the processor to a second processing level that is greater than the first processing level;
- in response to the processing time exceeding a second threshold of time that is greater than the first threshold of time, decreasing the processing level of the processor to a third processing level that is less than the second processing level but greater than the first processing level, wherein the second threshold of time is determined based on a desired frame rate of an application executing on the processor.
1 more element
A method for controlling a processing level of a processor of a device, comprising:
- determining that the processor has entered a processing state after an idle state, wherein the processor initially operates at a first processing level in the processing state;
- in response to the processor entering the processing state, monitoring processing time of the processor since entering the processing state;
- in response to the processing time exceeding a first threshold of time, increasing the processing level of the processor to a second processing level that is greater than the first processing level;
- in response to the processing time exceeding a second threshold of time that is greater than the first threshold of time, decreasing the processing level of the processor to a third processing level that is less than the second processing level but greater than the first level;
- in response to the processing time exceeding a third threshold of time that is greater than the second threshold of time, decreasing the processing level of the processor to a fourth processing level that is less than the third processing level but greater than the first processing level.
2 more elements
Dependencies are inferred from the claim text.