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US 8,572,412 B1Granted
Method and apparatus for warming up integrated circuits
AssigneeMarvell Israel (M.I.S.L) Ltd.
InventorYosef Solt
Life of this patent
Estimating the term…
Abstract
Aspects of the disclosure provide an integrated circuit (IC) chip. The IC chip includes functional circuits configured to perform desired functions when a chip temperature is higher than a threshold, such as a room temperature. The IC chip includes a warm-up module configured to warm-up the IC chip in a warm-up mode to raise the chip temperature above the threshold. A method for warming up an IC chip prior to operation is also disclosed.
Claims17
An integrated circuit (IC) chip, comprising:
- a plurality of functional circuits configured to perform desired functions when a chip temperature is higher than a threshold;
- a warm-up module configured to warm-up the IC chip during a warm-up mode to raise the chip temperature above the threshold, a warming energy being supplied during the warm-up mode at least by performing an operation using a functional circuit, among the plurality of functional circuits, having another function that is not a warming function;
- and
- a warm-up controller configured to generate a pseudo random bit sequence (PRBS) as inputs to the plurality of functional circuits and drive the plurality of functional circuits to warm up the IC chip.
1 more element
A method for warming up integrated circuits, comprising:
- powering up a plurality of functional circuits on an integrated circuit (IC) chip in a warm-up mode, a warming energy supplied during the warm-up mode being supplied by performing an operation using a functional circuit of the plurality of functional circuits having another function that is not a warming function, the plurality of functional circuits being configured to perform desired functions in a normal operation mode related to a chip temperature;
- driving at least a portion of the plurality of functional circuits to warm-up the IC chip until the chip temperature exceeds a threshold;
- switching the IC chip into the normal operation mode;
- generating pseudo random bit sequence (PRBS);
- and
- providing the pseudo random bit sequence as inputs to the plurality of functional circuits.
3 more elements
The method of 15, further comprising:
- controlling a built-in self-test (BIST) to generate test patterns to test the logic circuits.
Dependencies are inferred from the claim text.