Support for non-local returns in parallel thread SIMD engine

A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to execute a non-local return instruction in a parallel thread processor, by performing the steps of:

• receiving, within a thread group including a plurality of active threads, a first long jump instruction;
• in response to the first long jump instruction, popping a first token from an execution stack;
• determining whether the first token is a first long jump token that was pushed onto the execution stack when a first push instruction associated with the first long jump instruction was executed, wherein the first long jump token specifies an address of a second instruction;
• and
• for each active thread in the thread group, when the first token is the first long jump token, jumping to the second instruction based on the address specified by the first long jump token, or, when the first token is not the first long jump token, disabling the active thread until the first long jump token is popped from the execution stack.

A computing device, comprising:

• a memory;
• and
• a processor configured to:
• receive, within a thread group including a plurality of active threads, a first long jump instruction;
• in response to the first long jump instruction, pop a first token from an execution stack;
• determine whether the first token is a first long jump token that was pushed onto the execution stack when a first push instruction associated with the first long jump instruction was executed, wherein the first long jump token specifies an address of a second instruction;
• and
• for each active thread in the thread group, when the first token is the first long jump token, jump to the second instruction based on the address specified by the first long jump token, or, when the first token is not the first long jump token, disable the active thread until the first long jump token is popped from the execution stack.