US 8,572,342 B2 · Data transfer device with confirmation of write completion and method of controlling the same

Abstract

A data transfer device that confirms completion of writing into a memory on transferring data to the memory via a bus through which a response indicating completion of data writing in the memory is not sent back includes an inter-memory data transfer control unit performing data transfer between the memories. When the inter-memory data transfer control unit detects switching of a write destination memory from a first memory to a second memory, in order to confirm that writing into the first memory is completed, the inter-memory data transfer control unit performs confirmation of write completion as to the first memory by a procedure different from writing into the memory. When a data transfer with a designated transfer length is completed, in order to confirm that writing is completed as to the write destination memory at the end of the data transfer, the inter-memory data transfer control unit performs confirmation of write completion as to the write destination memory at the end of the transfer by the procedure different from writing into the memory. The inter-memory data transfer control unit notifies the processor of completion of an inter-memory data transfer based on the confirmation of write completion.

Claims25

Dependent claims

A data transfer device that transfers data to a memory according to an instruction from a processor via a bus through which a response indicating completion of data writing in the memory is not sent back, comprising:

an inter-memory data transfer control unit performing data transfer between the memories, the inter-memory data transfer control unit including
an operation start trigger receiving unit for receiving an operation start trigger from the processor,
a parameter acquiring unit for acquiring a transfer instruction parameter including information on a data transfer instruction created by the processor,
a read unit for reading data from the memory designated by the transfer instruction parameter,
a write unit for writing the data read by the read unit into the memory designated by the transfer instruction parameter, wherein
when the write unit detects switching of a write destination memory from a first memory to a second memory, in order to confirm that writing into the first memory is completed, the write unit performs confirmation of write completion as to the first memory by a procedure different from writing into the memory,
when a data transfer instructed by the processor is completed, in order to confirm that writing into the memory is completed as to the write destination memory at the end of the data transfer, the write unit performs confirmation of write completion as to the write destination memory at the end of the data transfer by the procedure different from writing into the memory, and
the inter-memory data transfer control unit notifies the processor of completion of an inter-memory data transfer based on the confirmation of the write completion.

5 more elements

A data transfer method for transferring data to a memory via a bus through which a response indicating completion of data writing in the memory is not sent back, using an inter-memory data transfer control unit performing data transfer between the memories according to an instruction from a processor, comprising:

when the inter-memory data transfer control unit receives an operation start trigger from the processor,
acquiring by the inter-memory data transfer control unit a transfer instruction parameter including information on a data transfer instruction created by the processor,
reading by the inter-memory data transfer control unit repetitively data from the memory designated by the transfer instruction parameter until a data length of the read data amounts to a transfer length designated by the transfer instruction parameter,
writing by the inter-memory data transfer control unit repetitively the read data to the memory designated by the transfer instruction parameter until a data length of the written data amounts to a transfer length designated by the transfer instruction parameter on data writing by the inter-memory data transfer control unit,
when the inter-memory data transfer control unit detects switching of a write destination memory from a first memory to a second memory, in order to confirm that writing into the first memory is completed, performing by the inter-memory data transfer control unit confirmation of write completion as to the first memory by a procedure different from writing into the memory,
when a data transfer instructed by the processor is completed, in order to confirm that writing into the memory is completed as to the write destination memory at the end of the data transfer, performing by the inter-memory data transfer control unit confirmation of write completion as to the write destination memory at the end of the data transfer by the procedure different from writing into the memory, and notifying the processor of completion of an inter-memory data transfer based on the confirmation of write completion by the inter-memory data transfer control unit.

3 more elements

Dependencies are inferred from the claim text.

Data transfer device with confirmation of write completion and method of controlling the same

Life of this patent

Data transfer device with confirmation of write completion and method of controlling the same

Life of this patent

Abstract

Claims25