Apparatus and method for segmented cache utilization
AssigneeIntel Corporation
InventorsDale Jeunemann, R. Scott Tetrick, Oscar Pinto
Life of this patent
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AssigneeIntel Corporation
InventorsDale Jeunemann, R. Scott Tetrick, Oscar Pinto
Estimating the term…
In some embodiments, a non-volatile cache memory may include a segmented non-volatile cache memory configured to be located between a system memory and a mass storage device of an electronic system and a controller coupled to the segmented non-volatile cache memory, wherein the controller is configured to control utilization of the segmented non-volatile cache memory. The segmented non-volatile cache memory may include a file cache segment, the file cache segment to store complete files in accordance with a file cache policy, and a block cache segment, the block cache segment to store one or more blocks of one or more files in accordance with a block cache policy, wherein the block cache policy is different from the file cache policy.
A processor-based system, comprising:
A non-volatile cache memory, comprising:
A method comprising:
Dependencies are inferred from the claim text.