Controller for storage device with improved burst efficiency
AssigneeMarvell International Ltd.
InventorsTheodore White, Stanley Cheong, Lim Hudiono, William Dennin, III, Chau Tran
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AssigneeMarvell International Ltd.
InventorsTheodore White, Stanley Cheong, Lim Hudiono, William Dennin, III, Chau Tran
Estimating the term…
A controller and a method for interfacing between a host and storage medium. A storage medium interface includes CH0 circuitry for performing a CH0 process to access a buffer memory on behalf of the storage medium. A host interface includes CH1 circuitry for performing a CH1 process to access the buffer memory on behalf of the host. Access to the buffer memory is arbitrated in sequential tenures to each channel of the multi-channel bus within a maximum arbitration round trip time defined by the time taken by the storage medium to move a distance corresponding to N sectors in which N is greater than one. In the CH0 tenure, the CH0 process transfers data corresponding to N sectors of the storage medium in a multi-sector burst. The length of the tenure of the CH0 channel is pre-designated so that the multi-sector burst is completed within the CH0 tenure.
A controller for interfacing between a host and a storage medium, the storage medium partitioned into multiple sectors, the controller comprising:
A method for interfacing between a host and a storage medium, the storage medium partitioned into multiple sectors, the method comprising:
Dependencies are inferred from the claim text.