Limitation of distortion introduced by a post-processing step during digital signal decoding

A digital signal processing module for processing a digital signal, the signal being decoded and undergoing a noise reduction post-processing, said module limiting a distortion introduced by the post-processing and comprising:

• a hardware processor that assigns to the digital signal a current amplitude having an intermediate value between a current amplitude value of the post-processed signal and a corresponding current amplitude value of the decoded signal, or the current amplitude value of the post-processed signal, according to the respective values of the current amplitude of the decoded signal and the current amplitude of the post-processed signal,
• the hardware processor defines an interval of permitted amplitudes, the interval comprising a lower bound and an upper bound which are dependent on a current amplitude value of the decoded signal, and
• the hardware processor, for a corresponding current amplitude of the post-processed signal, assigns a current amplitude value to the output signal, equal to the value of:
• the lower bound if the current amplitude of the post-processed signal is below the value of the lower bound,
• the upper bound if the current amplitude of the post-processed signal is above the value of the upper bound, and
• the current amplitude of the post-processed signal if the value of the current amplitude of the post-processed signal is included in said interval.