Apparatus and methods for high-speed interpolator-based clock and data recovery
AssigneeAltera Corporation
InventorLip Kai Soh
Life of this patent
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Abstract
One embodiment relates to an interpolator-based clock and data recovery circuit which includes a de-multiplexer and a voting circuit. The de-multiplexer is arranged to de-multiplex a feedback signal from a sampler, and the voting circuit is arranged decimate the de-multiplexed feedback signal. The decimated feedback signal may be provided to a digital filter. Another embodiment relates to a method for clock and data recovery from a data signal. The method includes de-multiplexing and decimation of a feedback signal. Other embodiments and features are also disclosed.
Claims16
A clock and data recovery circuit comprising:
- a sampler circuit arranged to receive a data signal and a sampling clock and generate a feedback signal which is responsive to a phase of the data signal relative to the sampling clock signal;
- a de-multiplexer circuit arranged to de-multiplex the feedback signal and output a de-multiplexed feedback signal;
- a voting circuit arranged to decimate the de-multiplexed feedback signal and output a decimated feedback signal;
- a digital filter circuit arranged to filter the decimated feedback signal from the voting circuit and to output a filtered feedback signal;
- a finite state machine circuit arranged to receive the filtered feedback signal and generate an interpolator control signal;
- and
- a phase interpolator circuit arranged to generate the sampling clock responsive to a reference clock and the interpolator control signal,
- wherein the de-multiplexer circuit comprises higher-speed circuit blocks which are arranged to receive the feedback signal and lower-speed circuit blocks which are arranged to output the de-multiplexed feedback signal.
A method for clock and data recovery from a data signal, the method comprising:
- generating a feedback signal which is responsive to a phase of a data signal relative to a sampling clock signal;
- de-multiplexing the feedback signal to generate a de-multiplexed feedback signal;
- decimating the de-multiplexed feedback signal to generate a decimated feedback signal;
- filtering the decimated feedback signal to generate a filtered feedback signal;
- generating an interpolator control signal using the filtered feedback signal and a finite state machine;
- and
- generating the sampling clock by interpolation using a reference clock and the interpolator control signal,
- wherein the de-multiplexing is performed by higher-speed circuit blocks which are arranged to receive the feedback signal and lower-speed circuit blocks which are arranged to output the de-multiplexed feedback signal.
A receiver for a data link, the receiver comprising:
- a buffer circuit arranged to receive a data signal and generate a buffered data signal;
- and
- a programmable clock and data recovery circuit arranged to generate a sampling clock from the buffered data signal, the clock and data recovery circuit including
- a sampler arranged to generate a feedback signal which is responsive to a phase of the data signal relative to the sampling clock signal,
- a programmable de-multiplexer arranged to de-multiplex the feedback signal and output a de-multiplexed feedback signal, wherein the programmable de-multiplexer is configurable to a plurality of de-multiplexer settings,
- a programmable voting circuit arranged to decimate the de-multiplexed feedback signal and output a decimated feedback signal, wherein the voting circuit comprises a majority voting circuit with a plurality of programmable settings for at least one of the de-multiplexer settings,
- a digital filter arranged to filter the decimated feedback signal and output a filtered feedback signal,
- a finite state machine arranged to receive the filtered feedback signal and generate an interpolator control signal, and
- a phase interpolator arranged to generate the sampling clock responsive to a reference clock and the interpolator control signal.
Dependencies are inferred from the claim text.