Software defined radio for modulation and demodulation of multiple communication standards

A method for demodulating an input signal in software defined radio (SDR) subsystem that is capable of supporting multiple communication standards, said method comprising:

• receiving from a tuner one of a zero Intermediate Frequency (IF) signal, a low IF signal, and a standard IF signal;
• down converting one of said low IF signal, and said standard IF signal into a down converted IF signal;
• performing a FIR filtering, an IIR filtering, an interpolation and a sample rate conversion filtering on said down converted IF signal to produce a filtered complex baseband signal using a Signal Conditioning CPU (SCON CPU) adapted for a sample based signal processing;
• performing a demodulation, a channel estimation, a channel correction, and a de-mapping on said filtered complex baseband signal based on said multiple communication standards to obtain decision bits using a Signal Processing CPU (SPROC CPU) adapted for a block based signal processing;
• and
• performing at least one of a Viterbi decoding, a Reed Solomon (RS) decoding, and a Low-Density Parity-Check (LDPC) decoding on said decision bits to obtain decoded data.

A method for modulating an input signal in a software defined radio (SDR) subsystem that is capable of supporting multiple communication standards, said method comprising:

• performing at least one of a Viterbi encoding, a Reed Solomon (RS) encoding, convolution encoding and a Low-Density Parity-Check (LDPC) encoding on said input signal to produce encoded bits;
• performing a modulation, a framing, and a mapping on said encoded bits based on said multiple communication standards to obtain baseband signals using a Signal Processing CPU (SPROC CPU) adapted for a block based signal processing;
• performing an up-conversion and a pulse shaping of said baseband signals to produce a digital IF signal using a Signal Conditioning CPU (SCON CPU) adapted for a sample based signal processing;
• converting said digital IF signal into an analog signal;
• and
• performing, using a complex arithmetic slot and a cordic slot of said Signal Processing CPU (SPROC CPU), said modulation, said framing and said mapping on said encoded bits.