Nonvolatile memory device with 3D memory cell array

A nonvolatile memory device comprising:

• a three-dimensional (3D) memory cell array including a plurality of memory cells arranged in a plurality memory cell array layers stacked on a substrate, such that a plurality of words lines extends across the plurality of memory cell array layers from a lowest memory cell array layer closest to the substrate to a highest memory cell array layer farthest from the substrate, wherein the 3D memory cell array comprises a pillar that extends through the plurality of memory cell array layers and that progressively narrows in width as it extends from the highest memory cell array layer to the lowest memory cell array layer;
• a voltage generator circuit that generates a first voltage signal and a second voltage signal;
• and
• a row selecting circuit that simultaneously applies the first voltage signal to a selected word line among the plurality of word lines and the second voltage signal to an unselected word line among the plurality of word lines,
• wherein each one of the plurality of words lines intersects the pillar with a different cross-sectional area, such that the selected word line and the unselected word line have different resistances, and
• the first voltage signal is applied to the selected word line and the second voltage signal is applied to the unselected word line with a same rising slope over a defined period of time.