Digital-to-analog converter implementing hybrid conversion architecture
AssigneeSiGear Europe Sarl
InventorsAlain-Serge Porret, Friederich Mombers, Melly Thierry
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Abstract
A digital-to-analog converter (DAC) implements a hybrid conversion architecture where the input digital data is oversampled and a flash converter is used to convert the M most significant bits (MSBs) of the oversampled data while a sigma-delta (Σ-Δ) converter is used to convert the remaining least significant bits (LSBs) of the oversampled data. In one embodiment, a merged flash converter is used to convert the M MSBs and the digital bit stream generated by the sigma-delta converter.
Claims23
A digital-to-analog converter (DAC) circuit receiving an N1-bit digital input data at a first sampling frequency and generating an analog output signal indicative of the digital input data, the DAC circuit comprising:
- a rate converter configured to receive the N1-bit digital input data and to generate an oversampled output data in N2 bits at an oversampled frequency being K times the first sampling frequency;
- a first converter configured to receive M most significant bits (MSBs) of the oversampled output data and to generate a first analog signal indicative of the M MSBs of the oversampled output data;
- a sigma-delta converter configured to receive N2-M least significant bits (LSBs) of the oversampled output data and to generate a second analog signal indicative of the N2-M LSBs of the oversampled output data;
- a data combiner configured to combine the first and second analog signals and to generate a third analog signal;
- and
- an anti-aliasing filter configured to filter the third analog signal to generate a filtered analog output signal as the analog output signal of the DAC circuit.
A digital-to-analog converter (DAC) circuit receiving an N1-bit digital input data at a first sampling frequency and generating an analog output signal indicative of the digital input data, the DAC circuit comprising:
- a rate converter configured to receive the N1-bit digital input data and to generate an oversampled output data in N2 bits at an oversampled frequency being K times the first sampling frequency;
- a sigma-delta modulator configured to receive N2-M least significant bits (LSBs) of the oversampled output data and to process the N2-M LSBs into a P-state digital bit stream, P being 2 or more;
- a data combiner configured to receive and combine M most significant bits (MSBs) of the oversampled output data and the P-states digital bit stream into a set of combined data bits;
- a converter configured to receive the set of combined data bits and to generate a first analog signal;
- and
- an anti-aliasing filter configured to filter the first analog signal to generate a filtered analog output signal as the analog output signal of the DAC circuit.
Dependencies are inferred from the claim text.