Back to results
US 8,570,090 B2Granted
Electronic component protection power supply clamp circuit
AssigneeAdvanced Micro Devices, Inc.
InventorsWilliam B. Gist, III, Warren Anderson
Life of this patent
Estimating the term…
Loading patent…
Loading patent…
AssigneeAdvanced Micro Devices, Inc.
InventorsWilliam B. Gist, III, Warren Anderson
Estimating the term…
Electronic component protection power supply clamp circuits comprising a plurality of p-type channel metal-oxide-semiconductor (PMOS) and n-type channel metal-oxide-semiconductor (NMOS) transistors are described. These clamp circuits use a feedback latching circuit to retain an electrostatic discharge (ESD)-triggered state and efficiently conduct ESD current that has been diverted into the power supply, in order to dissipate ESD energy. The feedback latching circuit also maintains a clamp transistor in its off state if the clamp circuit powers up untriggered, thus enhancing the clamp circuit's immunity to noise during normal operation. Passive resistance initialization of key nodes to an untriggered state, as well as passive resistance gate input loading of a large ESD clamping transistor, further enhances the clamp circuit's immunity to false triggering. This also lengthens the time that the clamp circuit remains in the ESD-triggered state during human body model (HBM) or other long duration detected ESD events.
An electronic component protection power supply clamp circuit connected to a positive terminal and a negative terminal of a power supply, the clamp circuit comprising:
A computer-readable storage medium configured to store a set of instructions used for manufacturing a semiconductor device, wherein the semiconductor device comprises:
Dependencies are inferred from the claim text.