Back to results
US 8,570,081 B2Granted
Fast measurement initialization for memory
AssigneeMicron Technology, Inc.
InventorYantao Ma
Life of this patent
Estimating the term…
Abstract
Systems and methods for synchronization of clock signals are disclosed. In a feedback system such as a delay-lock loop circuit, delays to be applied can be determined adaptively based on a phase difference between a reference signal and a clock signal being delayed. Such adaptive decisions can be made during each feedback cycle, thereby making it possible to achieve a phase lock faster and more efficiently. In some embodiments, such adaptive functionality can be incorporated into existing circuits with minimal impact.
Claims20
A method for phase-locking a clock signal to a reference signal in a delay-lock loop, the method comprising:
- obtaining a phase difference between a clock signal and a reference signal during a phase comparison cycle;
- and
- shifting the phase of the clock signal by a collective amount such that a locking of the clock signal occurs during the phase comparison cycle, the collective amount based at least in part on the obtained phase difference and a plurality of delay adjustments, each delay adjustment associated with an enable status, a delay adjustment value and a phase adjustment window, the collective amount determined by iteratively shifting the clock signal by the delay adjustment value when the delay adjustment is enabled and a phase difference is outside the phase adjustment window, and updating the phase difference and the enable status based on the shifting for each delay adjustment.
A phase-locking system, comprising:
- computer hardware including at least one processor;
- and
- computer-readable storage including computer-readable instructions that, when executed by the processor, cause the computer hardware to perform operations defined by the computer-executable instructions, the computer-executable instructions including:
- obtaining a phase difference between a clock signal and a reference signal during a phase comparison cycle;
- and
- shifting the phase of the clock signal by a collective amount of delay such that a locking of the clock signal occurs during the phase comparison cycle, the collective amount of delay based at least in part on the obtained phase difference and a plurality of delay adjustments, each delay adjustment associated with an enable status, a delay adjustment value and a phase adjustment window, the collective amount of delay determined by iteratively shifting the clock signal by the delay adjustment value when the delay adjustment is enabled and a phase difference is outside the phase adjustment window, and updating the phase difference and the enable status based on the shifting for each delay adjustment.
3 more elements
A memory device comprising:
- a phase detection component configured to determine a phase difference between a clock signal and a reference signal during a phase comparison cycle;
- a decision component in communication with a control logic having an enable status, a delay adjustment value and a phase adjustment window for each of a plurality of delay adjustments during a plurality of delay adjustment cycles, the decision component configured to adaptively determine a collective amount of delay to be applied to the clock signal based on the obtained phase difference and the plurality of delay adjustments until locking of the clock signal occurs during the phase comparison cycle, the adaptively determined collective amount of delay determined by iteratively shifting the clock signal by the delay adjustment value when the delay adjustment is enabled and a phase difference is outside the phase adjustment window, and updating the phase difference and the enable status based on the shifting for each delay adjustment;
- and
- a control component configured to control the phase detection component and the decision component so as to effectuate the adaptively determined collective amount of delay, the control component further configured to update a delay-locked loop based on the adaptively determined collective amount of delay during the phase comparison cycle.
1 more element
Dependencies are inferred from the claim text.