Advanced clock synchronization circuit for switch mode power supplies

A synchronization circuit for switching between an internal clock and an external clock for operating a switch mode power supply, the synchronization circuit comprising:

• an internal oscillator for generating an internal clock;
• a clock selector switch for switching between said external clock, said internal clock, and a replacement clock for operation of said power supply, said switch enabling said internal clock to operate said power supply when an internal clock select signal is generated and enabling said external clock to operate said power supply when an external clock select signal is generated at all times except when a replacement clock pulse is generated;
• a first circuit to detect when a stable external clock exists and for causing said external clock select signal to be generated in response to said detection;
• a second circuit to detect when an external clock pulse has a period that is longer than the period of the previous external clock pulse by a predetermined dropout threshold and for generating a replacement clock pulse in response;
• and
• a first counter for counting the number of replacement clock pulses sequentially generated by said second circuit and for causing said internal clock select signal to be generated when a predetermined count has been reached by said first counter, said first counter being reset by any external clock pulse whose period does not cause the generation of a replacement clock pulse.

A power supply, comprising:

• a voltage converter;
• a pulse width modulation control circuit for controlling the operation of said voltage converter;
• an internal oscillator for generating an internal clock;
• a clock selector switch for outputting a PWM clock to said pulse width modulation control circuit;
• a first circuit for detecting when an external clock is generating pulses of a predetermined stability, said clock selector switch acting in response to said detection to output the external clock as said PWM clock;
• a second circuit to detect when a pulse generated by said external clock has a period that is longer than the period of the previous external clock pulse by a predetermined dropout threshold and for causing a replacement clock pulse to be generated, said clock selector switch acting in response to output the replacement clock pulse as said PWM clock;
• and
• a counter for determining when a predetermined number of replacement clock pulses have been sequentially generated, said clock selector switch acting in response to said determining to output the internal clock as said PWM clock.

A power system comprising:

• a plurality of power supply modules whose outputs are coupled in parallel for connection to a load;
• and
• an external clock coupled to each said power supply module;
• wherein each said power supply module comprises:
• a first circuit for detecting when the external clock is generating pulses of a predetermined stability and for causing an external clock select signal to be generated in response to said detection;
• a second circuit to detect when an external clock pulse has a period that is longer than the period of the previous external clock pulse by a predetermined dropout threshold and for causing a replacement clock pulse to be generated in response;
• and
• a counter for causing an internal clock select signal to be generated when a predetermined number of replacement clock pulses have been sequentially generated.