High memory density, high input/output bandwidth logic-memory structure and architecture

A method of identifying and correcting distortions in a stacked memory unit resulting from a memory stack building process for a logic-memory device, the method comprising:

• scanning the stacked memory unit, locating a position of each of a plurality of memory slices relative to a position of others of the plurality of memory slices resulting from the scanning, and calculating a skew value representing a difference between a current position of leads of the plurality of memory slices and a pre-planned position of the leads;
• and
• responsive to determining a distortion exists from the scanning, correcting the distortion using the skew value by laser direct writing a connection between each of a plurality of logic grid connections and corresponding leads.

A chip stack structure, comprising:

• a crossbar chip having an active device surface;
• a plurality of combined memory and processor slices of a processor memory unit vertically aligned such that an active device surface of the plurality of the combined memory and processor slices is oriented perpendicular to the active device surface of the crossbar chip, wherein electrical interconnects are formed between devices on the active device surface of the crossbar chip and devices on the active surface of the plurality of combined memory and processor slices by connections on an upper wiring surface of the plurality of combined memory and processor slices.