MOS devices with improved source/drain regions with SiGe

A method comprising:

• forming a gate stack over a semiconductor substrate;
• forming a dummy spacer on a sidewall of the gate stack;
• forming a recess in the semiconductor substrate and adjacent the dummy spacer;
• forming a SiGe region having at least a portion in the recess comprising:
• epitaxially growing a first portion of the SiGe region in the recess and covering a bottom and a sidewall of the recess, wherein the first portion has a first atomic percentage of germanium to germanium and silicon;
• and
• epitaxially growing a second portion of the SiGe region in a remaining portion of the recess, wherein the second portion has a second atomic percentage of germanium to germanium and silicon, and wherein the second atomic percentage is lower than the first atomic percentage;
• removing the dummy spacer;
• forming a gate spacer on the sidewall of the gate stack;
• performing an implantation to form a source/drain region in the SiGe region, wherein the source/drain region is of n-type;
• and
• reacting at least a top portion of the second portion of the SiGe region with a metal to form a silicide, wherein the first portion of the SiGe region does not form silicide with the metal, and wherein the second portion of the SiGe region is fully consumed in the step of reacting.