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US 8,569,812 B2Granted
Floating body memory cell having gates favoring different conductivity type regions
AssigneeIntel Corporation
InventorsPeter L. D. Chang, Uygar E. Avci, David L. Kencke, Ibrahim Ban
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Abstract
A method for fabricating floating body memory cells (FBCs), and the resultant FBCs where gates favoring different conductivity type regions are used is described. In one embodiment, a p type back gate with a thicker insulation is used with a thinner insulated n type front gate. Processing, which compensates for misalignment, which allows the different oxide and gate materials to be fabricated is described.
Claims4
A memory including:
- a plurality of first and second, parallel, spaced-apart fins, having alternate first and second regions between the fins defined by side surfaces on adjacent fins facing each other;
- first gate structures disposed on alternate first regions of the fins;
- second gate structures disposed on alternate second regions of the fins;
- wherein the second gate structures have at least one of a different gate oxide thickness and a different gate material than the first gate structures.
1 more element
Dependencies are inferred from the claim text.