Methods of fabricating three-dimensional semiconductor device
AssigneeSamsung Electronics Co., Ltd.
InventorsSang-Yong Park, Eunsun Youm
Life of this patent
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Abstract
A method of fabricating a three-dimensional semiconductor device includes forming a stacked structure, and the stacked structure includes a first layer, a second layer, a third layer, and a fourth layer sequentially stacked on a substrate. The method also includes forming a sacrificial spacer on a sidewall of the stacked structure such that the sacrificial spacer exposes a sidewall of the third layer, and recessing the exposed sidewall of the third layer thereby forming a recess region between the second and fourth layers.
Claims20
A method of fabricating a three-dimensional semiconductor device, the method comprising:
- forming a stacked structure, the stacked structure including a first layer, a second layer, a third layer, and a fourth layer sequentially stacked on a substrate;
- forming a sacrificial spacer on a sidewall of the stacked structure such that the sacrificial spacer exposes a sidewall of the third layer;
- and
- recessing the exposed sidewall of the third layer thereby forming a recess region between the second and fourth layers.
A method of fabricating a three-dimensional semiconductor device, the method comprising:
- forming a stacked structure, the stacked structure including a first layer, a second layer, a third layer, and a fourth layer sequentially stacked on a substrate;
- forming a sacrificial spacer on a sidewall of the stacked structure, such that the sacrificial spacer exposes a sidewall of the third layer;
- and
- recessing the exposed sidewall of the third layer, thereby forming a recess region between the second and fourth layers, wherein:
- the first layer is formed of substantially a same first material as the third layer,
- the second layer is formed of substantially a same second material as the fourth layer, and
- the first material of the first and third layers have an etching selectivity with respect to the second material of the second and fourth layers.
A method of fabricating a three-dimensional semiconductor device, the method comprising:
- forming a stacked structure including a plurality of alternating first and second layers;
- patterning the stacked structure to form at least one first step, the first step including multiple first and second layers having substantially a same width;
- forming a sacrificial spacer on a sidewall of the first step, the sacrificial spacer exposing a sidewall of an upper layer of the multiple first layers in the first step;
- and
- recessing the exposed sidewall of only the exposed upper layer in the first step to form a recess region between two second layers in the first step.
Dependencies are inferred from the claim text.