Thin film transistors having multi-layer channel
AssigneeSamsung Electronics Co., Ltd.
InventorsSun-il Kim, Young-soo Park, Jae-chul Park
Life of this patent
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Abstract
A transistor may include: a gate insulting layer, a gate electrode formed on a bottom side of the gate insulating layer, a channel layer formed on a top side of the gate insulating layer, a source electrode that contacts a first portion of the channel layer, and a drain electrode that contacts a second portion of the channel layer. The channel layer may have a double-layer structure, including an upper layer and a lower layer. The upper layer may have a carrier concentration lower than that of the lower layer. The upper layer may be doped with a carrier acceptor in order to have an electrical resistance higher than that of the lower layer.
Claims6
A thin film transistor, comprising:
- a gate insulating layer;
- a gate electrode formed on a bottom side of the gate insulating layer;
- a channel layer formed on a top side of the gate insulating layer;
- a source electrode that contacts a first portion of the channel layer;
- and
- a drain electrode that contacts a second portion of the channel layer;
- wherein the channel layer has a double-layer structure, including an uppermost layer and a lower layer, the lower layer being disposed between the uppermost layer and the gate insulating layer,
- wherein the uppermost layer has a carrier concentration lower than that of the lower layer, and
- wherein the uppermost layer is doped with a carrier acceptor in order to have an electrical resistance higher than that of the lower layer.
Dependencies are inferred from the claim text.