Nonvolatile semiconductor memory device
AssigneeSeiko Instruments Inc.
InventorHiroaki Takasu
Life of this patent
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Abstract
Provided is an electrically erasable and programmable nonvolatile semiconductor memory device having a small hole in a second conductivity-type drain region, a tunnel insulating film formed on the surface of the hole, and a protrusion extended from the floating gate electrode and arranged to fill the hole. Further a tunneling restriction region which is an electrically floating first conductivity type region arranged in a vicinity of the surface of the drain region around the hole to define the size of the tunnel region through which the tunnel current flows.
Claims9
An electrically erasable and programmable nonvolatile semiconductor memory device, comprising:
- a first conductivity-type semiconductor substrate;
- a second conductivity-type source region and a drain region disposed apart to face each other on a surface of the semiconductor substrate;
- a channel formation region sandwiched by the source region and the drain region, formed on the surface of the semiconductor substrate;
- a floating gate electrode disposed on a gate insulating film over the source region, the drain region and the channel region;
- a control gate electrode disposed on a control insulating film over the floating gate electrode and capacitively coupled to the floating gate electrode;
- a hole disposed in a part of the drain region, formed from a surface of the drain region to an inside thereof;
- a protrusion extended from the floating gate electrode, arranged to fill the hole;
- a tunneling restriction region disposed around the protrusion for defining a tunnel region;
- and
- a tunnel insulating film formed between a surface of the hole and a surface of the protrusion in the tunnel region.
Dependencies are inferred from the claim text.