Application of cluster beam implantation for fabricating threshold voltage adjusted FETs
AssigneeInternational Business Machines Corporation
InventorsOleg Gluschenkov, Dae-Gyu Park, Haizhou Yin
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Abstract
Semiconductor structures including a high k gate dielectric material that has at least one surface threshold voltage adjusting region located within 3 nm or less from an upper surface of the high k gate dielectric are provided. The at least one surface threshold voltage adjusting region is formed by a cluster beam implant step in which at least one threshold voltage adjusting impurity is formed directly within the high k gate dielectric or driven in from an overlying threshold voltage adjusting material which is subsequently removed from the structure following the cluster beam implant step.
Claims19
A method of fabricating a semiconductor structure comprising:
- forming a high k gate dielectric atop a semiconductor substrate including a first device region and a second device region;
- selectively forming a first surface threshold voltage adjusting region beneath an upper surface of the high k gate dielectric, yet located within 3 nm or less from the upper surface of the high k gate dielectric, in either the first device region or the second device region utilizing a cluster ion beam implant process, said cluster ion beam process introduces first threshold voltage adjusting metal particles into said high k gate dielectric in said first or second device region;
- and
- selectively forming a second surface threshold voltage adjusting region beneath the upper surface of the high k gate dielectric, yet located within 3 nm or less from the upper surface of the high k gate dielectric, in the other of the first device region or the second device region not including the first surface threshold voltage adjusting region utilizing another cluster ion beam implant process, said another cluster beam processes introduces second threshold voltage adjusting metal particles into said high k gate dielectric in the other of said first or second device region not including the first surface threshold voltage adjusting region.
A method of fabricating a semiconductor structure comprising:
- forming a high k gate dielectric atop a semiconductor substrate including a first device region and a second device region;
- selectively forming a first surface threshold voltage adjusting region in one portion of the high k gate dielectric located within 3 nm or less from an upper surface of the high k gate dielectric in either the first device region or the second device region utilizing a cluster ion beam implant process;
- and
- selectively forming a second surface threshold voltage adjusting region in another portion of the high k gate dielectric located within 3 nm or less from the upper surface of the high k gate dielectric in the other of the first device region or the second device region not including the first surface threshold voltage adjusting region utilizing another cluster ion beam implant process, wherein said selectively forming the first and second threshold voltage adjusting regions includes forming a first threshold voltage adjusting material atop the high k gate dielectric in both device regions, forming a first patterned mask atop the first threshold voltage adjusting material in one of the device regions, performing said cluster beam implant process which drives a first threshold voltage adjusting impurity from said first threshold voltage adjusting material not protected by the first patterned mask into said high k gate dielectric, removing the first patterned mask and the first threshold voltage adjusting material, forming a second threshold voltage adjusting material atop the high k gate dielectric in both device regions, forming a second patterned mask atop the second threshold voltage adjusting material in the device region including the first threshold voltage adjusting impurity, performing said another cluster beam implant process which drives a second threshold voltage adjusting impurity from said second threshold voltage adjusting material not protected by the second patterned mask into the high k gate dielectric, and removing the second patterned mask and the second threshold voltage adjusting material.
Dependencies are inferred from the claim text.