Methods for forming three-dimensional memory devices, and related structures
AssigneeMicron Technology, Inc.
InventorsNishant Sinha, Krishna K. Parat
Life of this patent
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Abstract
Methods of forming semiconductor devices that include one or more arrays of memory devices in a three-dimensional arrangement, such as those that include forming a conductive contact in a dielectric material overlying a memory array, wherein a wafer bonding and cleaving process may be utilized to provide a foundation material for forming another memory array having an active region in electrical contact with the conductive contact. Additionally, the conductive contact may be formed in a donor wafer, which in turn may be bonded to a dielectric material overlying a memory array using another wafer bonding process. Novel semiconductor devices and structures including the same may be formed using such methods.
Claims18
A method of forming a semiconductor device, comprising:
- forming a conductive material over a wafer having at least one opening therein to form a conductive material in the at least one opening;
- forming an implanted region within the wafer;
- attaching the wafer to a dielectric material overlying and at least partially surrounding a plurality of memory devices on another wafer;
- separating the wafer along an inner boundary of the implanted region to form a foundation material overlying the dielectric material, the foundation material comprising the conductive material at least partially within a portion of the wafer;
- and
- forming another plurality of memory devices on the foundation material, the conductive material in electrical contact with an active region of at least one of the another plurality of memory devices.
A semiconductor device, comprising:
- a plurality of memory devices disposed on a surface of a wafer;
- a dielectric material overlying the wafer and at least partially surrounding the plurality of memory devices;
- a foundation material overlying a major surface of the dielectric material;
- a conductive material disposed within at least one of the dielectric material and the foundation material;
- and
- another plurality of memory devices disposed on the foundation material, an active region of at least one of the another plurality of memory devices in electrical contact with the conductive material.
A semiconductor device, comprising:
- a plurality of levels of memory arrays in a stacked arrangement, each of the memory arrays comprising a plurality of memory devices;
- and
- a conductive material electrically contacting an active region of at least one of the plurality of memory devices on a side opposing an underlying memory array.
A semiconductor device, comprising:
- a dielectric material overlying and at least plurality of memory devices disposed on a wafer;
- another plurality of memory devices disposed on a foundation material overlying the dielectric material;
- and
- a conductive material disposed within at least one of the dielectric material and the foundation material and in electrical contact with an active region of at least one of the another plurality of memory devices.
Dependencies are inferred from the claim text.