FinFET with improved short channel effect and reduced parasitic capacitance

A semiconductor device formed on a SOI substrate which comprises a buried insulating layer and a semiconductor layer on the buried insulating layer, wherein a fin of semiconductive material having two opposing sides perpendicular to a main surface of the SOI substrate is provided in the semiconductor layer, the two opposing sides comprise a first side and a second side, said semiconductor device comprising:

• a source region and a drain region provided at other two opposing sides of the fin respectively;
• a channel region provided at a central portion of the fin;
• and
• a stack of gate dielectric and gate conductor provided at only the first side of the fin, where the gate conductor is isolated from the channel region by the gate dielectric,
• wherein the gate conductor extends laterally away from the first side of the fin in a gate extending direction parallel to the main surface of the SOI substrate;
• and
• wherein each of the source region and the drain region has a portion extending away from the second side of the fin in a source/drain extending laterally direction parallel to the main surface of the SOI substrate, the source/drain extending direction being opposite to the gate extending direction.