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US 8,544,006 B2Granted
Resolving conflicts by restarting execution of failed discretely executable subcomponent using register and memory values generated by main component after the occurrence of a conflict
AssigneeInternational Business Machines Corporation
InventorsRobert H. Bell, Jr., Louis Bennie Capps, Jr., Michael A. Paolini, Michael Jay Shapiro
Life of this patent
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Abstract
A method and apparatus for speculatively executing a single threaded program within a multi-core processor which includes identifying an idle core within the multi-core processor, performing a look ahead operation on the single thread instructions to identify speculative instructions within the single thread instructions, and allocating the idle core to execute the speculative instructions.
Claims9
A method for executing a single threaded program within a multi-core processor comprising:
- dividing the single threaded program into a plurality of discretely executable components, the plurality of discretely executable components comprising a main component and a plurality of discretely executable sub-components, the main component corresponding to a parent thread and the plurality of discretely executable sub-components corresponding to respective speculative sub-threads of the single threaded program, the dividing further comprising dividing the single threaded program by an operating system at function boundaries;
- generating a graph of relationships between the plurality of discretely executable components, the graph identifying the main component and the plurality of discretely executable sub-components;
- assigning the main component to execute on a first core of the multi-core processor;
- and,
- assigning each of the plurality of discretely executable sub-components to execute on at least one idle core of the multi-core processor;
- and
- managing conflicts between each of the plurality of discretely executable components via the graph, the conflicts comprising at least one of register conflicts and memory conflicts.
4 more elements
An apparatus comprising a multi-core processor for executing a single threaded program, the apparatus comprising:
- means for dividing the single threaded program into a plurality of discretely executable components, the plurality of discretely executable components comprising a main component and a plurality of discretely executable sub-components, the main component corresponding to a parent thread and the plurality of discretely executable sub-components corresponding to respective speculative sub-threads of the single threaded program, the means for dividing further comprising means for dividing the single threaded program by an operating system at function boundaries;
- means for generating a graph of relationships between the plurality of discretely executable components, the graph identifying the main component and the plurality of discretely executable sub-components;
- means for assigning the main component to execute on a first core of the multi-core processor;
- and,
- means for assigning each of the plurality of discretely executable sub-components to execute on at least one idle core of the multi-core processor;
- and,
- means for managing conflicts between each of the plurality of discretely executable components via the graph, the conflicts comprising at least one of register conflicts and memory conflicts.
4 more elements
A data processing system comprising:
- a multi-core processor;
- memory coupled to the multi-core processor, the memory comprising a single threaded optimization system for optimizing execution of a single threaded program on a multi-core processor, the single threaded optimization system comprising instructions executable by the multi-core processor for:
- dividing the single threaded program into a plurality of discretely executable components, the plurality of discretely executable components comprising a main component and a plurality of discretely executable sub-components, the main component corresponding to a parent thread and the plurality of discretely executable sub-components corresponding to respective speculative sub-threads of the single threaded program, the dividing further comprising dividing the single threaded program by an operating system at function boundaries;
- generating a graph of relationships between the plurality of discretely executable components, the graph identifying the main component and the plurality of discretely executable sub-components;
- assigning the main component to execute on a first core of the multi-core processor;
- and,
- assigning each of the plurality of discretely executable sub-components to execute on at least one idle core of the multi-core processor;
- and,
- managing conflicts between each of the plurality of discretely executable components via the graph, the conflicts comprising at least one of register conflicts and memory conflicts.
6 more elements
Dependencies are inferred from the claim text.