Method and apparatus for thermal analysis of through-silicon via (TSV)
AssigneeCadence Design Systems, Inc.
InventorsVinod Kariat, Eddy Pramono, Yong Zhan
Life of this patent
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AssigneeCadence Design Systems, Inc.
InventorsVinod Kariat, Eddy Pramono, Yong Zhan
Estimating the term…
Some embodiments of the invention provide a method for performing thermal analysis of an integrated circuit (“IC”) design layout. The IC design layout includes several wiring layers in some embodiments. The IC design layout includes a substrate that has at least one through-silicon via (“TSV”). The method divides the IC design layout into a set of elements. The method identifies a temperature distribution for the IC design layout by using the set of elements. In some embodiments, at least one element includes a metal component and a non-metal component. The non-metal component is silicon in some embodiments, and a dielectric in other embodiments.
A non-transitory computer readable medium storing a computer program for performing thermal analysis of an integrated circuit (“IC”) design layout, the computer program executable by at least one processor, the computer program comprising sets of instructions for:
A non-transitory computer readable medium storing a computer program for performing thermal analysis of an integrated circuit (“IC”) design layout, the computer program executable by at least one processor, the computer program comprising sets of instructions for:
A system comprising:
A system comprising:
Dependencies are inferred from the claim text.