US 8,543,877 B2Granted

Method of performing a chip burn-in scanning with increased efficiency

AssigneeEtron Technology, Inc.

InventorsWei-Ju Chen, Shi-Huei Liu, Lien-Sheng Yang

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Abstract

Utilize a pattern generator to write a predetermined logic voltage to each memory cell of a memory chip. Read a predetermined logic voltage stored in the memory cell. Compare the predetermined logic voltage stored in the memory cell with the predetermined logic voltage to determine if the memory cell is a good memory cell or not and store a determination result corresponding to the memory cell in a data latch of the memory chip. And determine if the memory chip is a good memory chip or not according to determination results of all memory cells of the memory chip stored in the data latch of the memory chip.

Claims11

Dependent claims

A method of performing chip burn-in scanning with increased efficiency, the method comprising:

utilizing a pattern generator to write a predetermined logic voltage to a plurality of memory cells of a memory chip;
reading a predetermined logic voltage stored in the plurality of memory cells;
comparing the predetermined logic voltage stored in the plurality of memory cells with the predetermined logic voltage written by the pattern generator to determine whether the plurality of memory cells are passing or not, and storing a plurality of determination results corresponding to the plurality of memory cells in a data latch of the memory chip;
executing at least one logic operation on the plurality of determination results stored in the data latch of the memory chip to generate a final logic operation result of the memory chip;
and
determining whether the memory chip passes or not according to the final logic operation result and a read signal generated from a test machine.

3 more elements

Dependencies are inferred from the claim text.