Apparatus and method of reducing page fault rate in virtual memory system
AssigneeSamsung Electronics Co., Ltd.
InventorsIl-hoon Shin, Ji-hyun In
Life of this patent
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AssigneeSamsung Electronics Co., Ltd.
InventorsIl-hoon Shin, Ji-hyun In
Estimating the term…
An apparatus for reducing a page fault rate in a virtual memory system includes a page table stored in a main storage unit which stores a reference address so as to read page information from the main storage unit; a buffer unit which stores a portion of the page table; and a processor which reads data from the main storage unit or which stores data in the main storage unit. When changing information for referring to a first page that exists in the page table, the processor performs a task invalidating information related to the first page in the buffer unit. A method of reducing the page fault rate includes resetting reference information stored in the page table; detecting whether the reference information exists in a buffer unit; and invalidating the reference information when the reference information exists in the buffer unit.
An apparatus for reducing a page fault rate in a virtual memory system, the apparatus comprising:
A method of reducing a page fault rate in a virtual memory system, the method comprising:
Dependencies are inferred from the claim text.