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US 8,543,776 B2Granted
On-die logic analyzer for semiconductor die
AssigneeIntel Corporation
InventorsTina C. Zhong, Jason G. Sandri, Kenneth P. Griesser, Lori R. Borger
Life of this patent
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Abstract
In one embodiment, the present invention includes a semiconductor die such as a system on a chip (SoC) that includes a logic analyzer with a built-in trace buffer to store information communicated between on-die agents at speed and to provide the information to an off-die agent at a slower speed. Other embodiments are described and claimed.
Claims12
An apparatus comprising:
- a memory to store data, the memory partitioned into at least a first storage, a second storage, and a third storage, wherein each storage is dedicated to a corresponding agent of a system associated with the memory, and when a first agent corresponding to the first storage is inactive, the first storage is configured to be dynamically combined with the second storage to store data of a second agent corresponding to the second storage, wherein the second storage is a primary queue for the second agent and the first storage is a secondary queue for the second agent, and further when a third agent corresponding to the third storage is inactive, the third storage is configured to be dynamically combined with the second storage, wherein the first storage has a higher priority than the third storage for storage of data associated with the second agent;
- and
- a controller including a table to indicate a priority for the dynamic combining between the first storage and the third storage, with respect to the second storage.
A method comprising:
- partitioning a memory into at least a first storage, a second storage, and a third storage, wherein each storage is dedicated to a corresponding agent of a system associated with the memory;
- dynamically combining the first storage with the second storage to store data of a second agent corresponding to the second storage when a first agent corresponding to the first storage is inactive, wherein the second storage is a primary queue for the second agent and the first storage is a secondary queue for the second agent, and dynamically combining the third storage with the second storage when a third agent corresponding to the third storage is inactive, wherein the first storage has a higher priority than the third storage for storage of data associated with the second agent;
- and
- indicating a priority for the dynamic combining between the first storage and the third storage, with respect to the second storage.
1 more element
A system on a chip (SoC) comprising:
- a processor;
- a chipset coupled to the processor via an interconnect;
- an on-die logic analyzer (ODLA) to monitor information communicated between the processor and the chipset, the ODLA including:
- a memory to store data, the memory partitioned into at least a first storage, a second storage, and a third storage, wherein each storage is dedicated to a corresponding agent of the SoC, and when a first agent corresponding to the first storage is inactive, the first storage is configured to be dynamically combined with the second storage of the memory to store data of a second agent corresponding to the second storage, wherein the second storage is a primary queue for the second agent and the first storage is a secondary queue for the second agent, and when a third agent corresponding to the third storage is inactive, the third storage is to be dynamically combined with the second storage, the first storage having a higher priority than the third storage for storage of data associated with the second agent;
- and
- a controller including a table to indicate a priority for the dynamic combining between the first storage and the third storage, with respect to the second storage.
3 more elements
Dependencies are inferred from the claim text.