Preventing unintended loss of transactional data in hardware transactional memory systems

An apparatus, comprising:

• a processor configured to enter a speculative execution mode, speculatively read a first word in a cache line as part of a transaction, speculatively read a second word in the cache line as part of the transaction, detect an instruction specifying release of at least one of the first word and the second word from a read set;
• and prevent the release of the at least one of the first word and the second word from the read set when the first word and the second word are not the same word.

A non-transitory computer readable storage medium comprising a data structure which is operated upon by a program executable on a computer system, the program operating on the data structure to perform a portion of a process to fabricate an integrated circuit including circuitry described by the data structure, the circuitry described in the data structure including:

• a processor configured to enter a speculative execution mode, speculatively read a first word in a cache line as part of a transaction, speculatively read a second word in the cache line as part of the transaction, detect an instruction specifying release of at least one of the first word and the second word from a read set;
• and prevent the release of the at least one of the first word and the second word from the read set when the first word and the second word are not the same word.

The non-transitory computer readable storage medium of 25, wherein the storage medium stores HDL, Verilog, or GDSII data.