US 8,543,768 B2Granted

Memory system including a spiral cache

AssigneeInternational Business Machines Corporation

InventorsFadi H. Gebara, Jeremy D. Schaub, Volker Strumpen

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Abstract

An integrated memory system with a spiral cache responds to requests for values at a first external interface coupled to a particular storage location in the cache in a time period determined by the proximity of the requested values to the particular storage location. The cache supports multiple outstanding in-flight requests directed to the same address using an issue table that tracks multiple outstanding requests and control logic that applies the multiple requests to the same address in the order received by the cache memory. The cache also includes a backing store request table that tracks push-back write operations issued from the cache memory when the cache memory is full and a new value is provided from the external interface, and the control logic to prevent multiple copies of the same value from being loaded into the cache or a copy being loaded before a pending push-back has been completed.

Claims16

Dependent claims

A storage sub-system forming a level of a hierarchical memory system, the storage sub-system comprising:

a cache memory comprising a plurality of storage locations and supporting multiple outstanding requests associated with a value stored in a unique one of the plurality of storage locations specified by an address contained within the request, wherein the cache memory moves the value specified by the address and provided in a response along with the address to a predetermined one of the plurality of storage locations that is coupled to an external interface via which the value can be accessed, whereby the value is uniquely stored in the predetermined one of the plurality of storage locations and is no longer accessible at the unique one of the plurality of storage locations and wherein the cache memory moves the value to the predetermined location in a time period determined by the proximity of the value to the predetermined location, whereby the multiple outstanding requests are satisfied out-of-order;
an issue table for tracking the multiple outstanding requests in an order of their receipt by the cache memory;
and
control logic for controlling the application of the multiple outstanding requests to the value stored in the predetermined location, whereby an order of completion of the multiple outstanding requests is controlled according to the order of their receipt by the cache memory.

1 more element

A method of operating a storage sub-system forming a level of a hierarchical memory system and having a plurality of storage locations, the method comprising:

issuing multiple requests associated with a value stored at a unique one of the plurality of storage locations specified by an address contained within the request, wherein the multiple requests are issued before responses to the requests have been returned;
moving the value specified by the address and provided in a response along with the address to a predetermined one of the plurality of storage locations that is accessible via an external interface, whereby the value is uniquely stored in the predetermined one of the plurality of storage locations and is no longer accessible at the unique one of the plurality of storage locations and wherein the cache memory moves the value to the predetermined location in a time period determined by the proximity of the value to the predetermined location, whereby the multiple outstanding requests are satisfied out-of-order;
tracking the multiple outstanding requests in an order of their receipt by the cache memory in an issue table;
and
controlling the application of the multiple outstanding requests to the value stored in the predetermined location, whereby an order of completion of the multiple outstanding requests is controlled according to the order of their issue by the issuing.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application: 12/640,360Filed 17 Dec 2009 · continuation in part
Priority: 13 Nov 2008
Published: US 2010/0122031 A113 May 2010
Granted: 24 Sep 2013
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

G06F 12/122
Using replacement algorithms: of the least frequently used [LFU] type, e.g. with individual count value
G06F 12/0855
Multiple simultaneous or quasi-simultaneous cache accessing: overlapped cache accessing, e.g. pipeline
G06F 12/0897
Caches characterised by their organisation or structure: with two or more cache hierarchy levels
G06F 2212/271
Using a specific cache architecture: non-uniform cache access [NUCA] architecture

Family

Application12/270,095Parent of this continuation-in-part · filed 13 Nov 2008
Application12/270,249Parent of this continuation-in-part · filed 13 Nov 2008
US 2010/0122033 A1Pre-grant publication · published 13 May 2010
US 8,060,699 B2Parent of this continuation-in-part
US 8,271,728 B2Parent of this continuation-in-part
US 2010/0122031 A1Published application
US 2010/0122035 A1Published application
US 8,543,768 B2This patent

From the US filing history. Foreign family members aren’t listed.

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