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US 8,543,758 B2Granted
Apparatus including memory channel control circuit and related methods for relaying commands to logical units
AssigneeMicron Technology, Inc.
InventorsDouglas A. Larson, Jeffrey R. Brown
Life of this patent
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Abstract
Memory system controllers can include a switch and non-volatile memory control circuitry coupled to the switch. The non-volatile memory control circuitry can include a channel control circuit coupled to logical units. The channel control circuitry can be configured to relay an erase command to a first one of the logical units and relay a particular command from the switch to a second one of the logical units while the erase command is being executed on the first one of the plurality of logical units.
Claims20
A method, comprising:
- relaying a first plurality of commands for a particular logical unit via a logical unit request queue (LRQ) in a channel control circuit to one of a plurality of logical unit command queues (LCQs) in an order that the first plurality of commands were received, wherein the plurality of LCQs are coupled to the LRQ and are associated with the particular logical unit;
- relaying a second plurality of commands for different logical units via the LRQ to those of the plurality of LCQs associated with the different logical units in an order according to a status of the different logical units;
- queuing, with the LRQ, a first command for a particular logical unit in response to the LCQ associated with the particular logical unit being full;
- receiving, with a channel request queue (CRQ) coupled to the channel control circuit, a second command from the switch and relaying the second command to the LRQ;
- and
- queuing, with the CRQ, a third command for the LRQ in response to the LRQ being full.
3 more elements
An apparatus, comprising:
- a switch;
- and
- non-volatile memory control circuitry coupled to the switch, wherein the non-volatile memory control circuitry includes:
- a plurality of channel control circuits, wherein each of the plurality of channel control circuits include:
- a plurality of logical unit command queues (LCQs);
- and
- a logical unit request queue (LRQ) coupled to the plurality of LCQs, wherein the LRQ is configured to:
- relay a first plurality of commands for a first particular logical unit to one of the plurality of LCQs associated with the first particular logical unit in an order that the first plurality of commands were received;
- relay a second plurality of commands for different logical units to those of the LCQs associated with the different logical units in an order according to a status of the different logical units;
- and
- queue a first command for a second particular logical unit in response to the LCQ associated with the second particular logical unit being full;
- and
- a channel request queue (CRQ) coupled to the plurality of channel control circuits, wherein the CRQ is configured to:
- receive a second command from the switch and relay the second command to one of the LRQs;
- and
- queue a third command for a particular LRQ in response to the particular LRQ being full.
13 more elements
An apparatus, comprising:
- a switch;
- and
- non-volatile memory control circuitry coupled to the switch, wherein the non-volatile memory control circuitry includes:
- a plurality of channel control circuits, wherein each of the plurality of channel control circuits include:
- a plurality of logical unit command queues (LCQs);
- and
- a logical unit request queue (LRQ) coupled to the plurality of LCQs, wherein the LRQ comprises an L-number-deep queue circuit, where L is equal to a number of logical units per channel control circuit, and wherein the LRQ is configured to:
- relay a first plurality of commands for a particular logical unit to one of the plurality of LCQs associated with the particular logical unit in an order that the first plurality of commands were received;
- and
- relay a second plurality of commands for different logical units to those of the LCQs associated with the different logical units in an order according to a status of the different logical units;
- and
- a channel request queue (CRQ) coupled to the plurality of channel control circuits, wherein the CRQ is configured to receive a command from the switch and relay the command to one of the LRQs.
9 more elements
An apparatus, comprising:
- a switch;
- and
- non-volatile memory control circuitry coupled to the switch, wherein the non-volatile memory control circuitry includes:
- a plurality of channel control circuits, wherein each of the plurality of channel control circuits include:
- a plurality of logical unit command queues (LCQs);
- and
- a logical unit request queue (LRQ) coupled to the plurality of LCQs, wherein the LRQ is configured to:
- relay a first plurality of commands for a particular logical unit to one of the plurality of LCQs associated with the particular logical unit in an order that the first plurality of commands were received;
- and
- relay a second plurality of commands for different logical units to those of the LCQs associated with the different logical units in an order according to a status of the different logical units;
- and
- a channel request queue (CRQ) coupled to the plurality of channel control circuits, wherein the CRQ comprises a C-number-deep queue circuit, where C is equal to x*(the plurality of channel control circuits), where x is a whole number, and wherein the CRQ is configured to receive a command from the switch and relay the command to one of the LRQs.
9 more elements
Dependencies are inferred from the claim text.