Multi-use physical architecture
AssigneeInternational Business Machines Corporation
InventorsDaniel M. Dreps, Kyu-hyoun Kim, Michael A. Sorna, Glen A. Wiedemeier
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AssigneeInternational Business Machines Corporation
InventorsDaniel M. Dreps, Kyu-hyoun Kim, Michael A. Sorna, Glen A. Wiedemeier
Estimating the term…
A multi-use physical (PHY) architecture that includes a PHY connection that includes one or more bit lines and that is communicatively coupled to a first processor. The PHY connection is configurable to carry signals between the first processor and a second processor, or between the first processor and a memory. The one or more bit lines are configured to carry signals bi-directionally at a first voltage when the PHY connection is configured to carry signals between the first processor and the memory. The one or more bit lines are configured to carry signals uni-directionally at a second voltage when the PHY connection is configured to carry signals between the first processor and the second processor. The second voltage is different than the first voltage.
A multi-use physical (PHY) architecture comprising:
A computer implemented method for configuring a multi-use physical (PHY) connection including comprising:
A multi-use physical (PHY) connection including:
Dependencies are inferred from the claim text.