Delegating network processor operations to star topology serial bus interfaces

A method for processing packet data in a multi-core processor including a plurality of processor cores, the method comprising:

• disposing a messaging network between the plurality of processor cores and a plurality of communication ports;
• and
• transferring packet data between the plurality of processor cores and the plurality of communication ports, wherein the transferring comprises:
• receiving, at the messaging network from a first communication port from among the plurality of communication ports, at least two packets of packet data for respective processing by at least two processor cores from among the plurality of processor cores,
• transmitting, from the messaging network to the at least two processor cores, the at least two packets of packet data for the respective processing,
• receiving, at the messaging network from the at least two processor cores, at least two processed packets of packet data, and
• transmitting, from the messaging network to a second communication port from among the plurality of communication ports, the at least two processes packets of packet data.

A multi-core processor, comprising:

• a plurality of processor cores, each processor core including a data cache and an instruction cache;
• a data switch arrangement coupled to the data cache of each of the plurality of processor cores, the data switch arrangement being configured to transfer information among the plurality of processor cores;
• and
• a messaging network disposed between the instruction cache of each of the plurality of processor cores and a plurality of communication ports, the messaging network being configured to transfer, in parallel, packet data between the plurality of processor cores and the plurality of communication ports, wherein
• to transfer the packet data, the messaging network is configured to:
• receive, from a first communication port from among the plurality of communication ports, at least two packets of packet data for respective processing by at least two processor cores from among the plurality of processor cores,
• transmit, to the at least two processor cores, the at least two packets of packet data for the respective processing,
• receive, from the at least two processor cores, at least two processed packets of packet data, and
• transmit the at least two processed packets of packet data to a second communication port from among the plurality of communication ports.