Hardware support for software controlled fast reconfiguration of performance counters

A hardware support method for software controlled reconfiguration of performance counters, comprising:

• selecting a configuration register using a first multiplexer among a plurality of configuration registers specifying which hardware related activities to count;
• a timer processing element obtaining a time interval value;
• and
• in response to detecting expiration of the time interval value, a state machine switching to the selected configuration register to reconfigure the selected activity tracked by a performance counter.

A non-transitory computer readable storage medium storing a program of instructions executable by a machine to perform a hardware support method for software controlled reconfiguration of performance counters, comprising:

• selecting a configuration register among a plurality of configuration registers specifying which hardware related activities to count;
• identifying an on or off bit indicating whether to perform reconfiguring of the performance counter;
• a timer processing element obtaining a time interval value;
• and
• in response to detecting expiration of the time interval value and based on the on or off bit, a state machine switching to the selected configuration register to reconfigure the selected activity tracked by a performance counter.

A device for providing hardware support for reconfiguring performance counters in a computer system, comprising:

• a plurality of performance counters operable to collect one or more counts of one or more selected activities;
• a storage element storing an on or off bit indicating whether to perform reconfiguring of a performance counter of the plurality of performance counters;
• a plurality of configuration registers operable to store a set of performance counter configurations;
• and
• a state machine operable to select a configuration register from the plurality of configuration registers for reconfiguring the one or more performance counters based on the on or off bit.