Specialized processing block for programmable integrated circuit device

A programmable integrated circuit device comprising:

• programmable logic resources;
• programmable interconnect resources for routing signals among said programmable logic resources;
• and
• a plurality of specialized processing blocks, each of said specialized processing blocks comprising:
• a multiplier having two multiplicand inputs and a product output;
• an adder having as one adder input said product output of said multiplier, and having a second adder input and an adder output;
• a direct-connect output of said adder output to a first other one of said specialized processing blocks;
• and
• a direct-connect input from a second other one of said specialized processing blocks, said direct-connect input connecting a direct-connect output of said adder output of said second other one of said specialized processing blocks to a first one of said multiplicand inputs.

A method of configuring a programmable integrated circuit device to calculate a polynomial having a number of terms, wherein said programmable integrated circuit device comprises:

• programmable logic resources,
• programmable interconnect resources for routing signals among said programmable logic resources, and
• a plurality of specialized processing blocks, each of said specialized processing blocks comprising:
• a multiplier having two multiplicand inputs and a product output,
• an adder having as one adder input said product output of said multiplier, and having a second adder input and an adder output,
• a direct-connect output of said adder output to a first other one of said specialized processing blocks, and
• a direct-connect input from a second other one of said specialized processing blocks, said direct-connect input connecting a direct-connect output of said adder output of said second other one of said specialized processing blocks to first multiplexer circuitry for selectably connecting said direct-connect input to said first one of said multiplicand inputs and said second adder input;
• said method comprising, for each respective specialized processing block among a plurality of said specialized processing blocks corresponding to said number of said terms:
• configuring said first multiplexer circuitry to connect said direct-connect input to said first one of said multiplicand inputs.