Modified Gram-Schmidt core implemented in a single field programmable gate array architecture
AssigneeLockheed Martin Corporation
InventorLuke A. Miller
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AssigneeLockheed Martin Corporation
InventorLuke A. Miller
Estimating the term…
A modified Gram-Schmidt QR decomposition core implemented in a single field programmable gate array (FPGA) comprises a converter configured to convert a complex fixed point input to a complex floating point input, dual port memory to hold complex entries of an input matrix, normalizer programmable logic module (PLM) to compute a normalization of a column vector. A second PLM performs complex, floating point multiplication on two input matrix columns. A scheduler diverts control of the QRD processing to the normalizer PLM or the second PLM. A top level state machine communicates with scheduler and monitors processing in normalizer PLM and second PLM and communicates the completion of operations to scheduler. A complex divider computes final column for output matrix Q using floating point arithmetic. Multiplexer outputs computed values as elements of output matrix Q or R. Complex floating point operations are performed in a parallel pipelined implementation reducing latencies.
A processor for performing a QR decomposition (QRD) according to a modified Gram-Schmidt (MGS) QRD in a single field programmable gate array (FPGA) comprising:
A method of implementing a modified Gram-Schmidt (MGS) QR decomposition (QRD) in a single field programmable gate array (FPGA), wherein the MGS QRD decomposes an input matrix A into an output matrix Q and an output matrix R, the method comprising:
A non-transitory machine-readable medium upon which are stored instructions, the instructions when executed by a processor cause the processor to perform the steps of:
Dependencies are inferred from the claim text.