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US 8,543,628 B2Granted
Method and system of digital signal processing
AssigneeCypress Semiconductor Corporation
InventorMonte Mar
Life of this patent
Estimating the term…
Abstract
A system comprises a system interface to receive one or more instruction sets from a microcontroller and to receive digital data to be processed. The system further comprises a controller that is reconfigurable according to the one or more instruction sets received by the system interface. The system further comprises a data path device to perform digital filtering operations on the digital data as directed by the controller according to the reconfiguration of the controller by the one or more instruction sets.
Claims18
A system comprising:
- a controller includes a control state machine configured to store control store addresses, and includes a control store memory configured to store data path instructions, wherein the controller is configured to identify one of the control store addresses stored in the control state machine and select one of the data path instructions stored in the control store memory with the identified control store address;
- an address calculation device configured to store coefficient addresses and to select one of the coefficient addresses in response to a first portion of the selected data path instruction received from the control store memory;
- and
- a data path device configured to identify a location of at least one filter coefficient stored by the data path device in response to the selected coefficient address received from the address calculation device, wherein the data path device is configured to perform digital filtering operations on digital data with the at least one filter coefficient in response to a second portion of the selected data path instruction received from the control store memory.
1 more element
A method comprising:
- receiving, with a controller, control store addresses and data path instructions in instruction sets;
- selecting, with the controller, at least one of the control store addresses based, at least in part, on a configuration of the controller;
- identifying, with the controller, one of the data path instructions according to the selected control store address;
- and
- providing, with the controller, a first portion of the identified data path instruction to an address calculation device storing filter addresses, wherein the address calculation device is configured to select one of the filer addresses with the first portion of the identified data path instruction;
- and
- providing, with the controller, a second portion of the identified data path instruction to a data path device, wherein the data path device is configured to perform signal processing operations on digital data with at least one filter coefficient located in the data path device by the selected filter address from the address calculation device and in response to the second portion of the identified data path instruction received from the controller.
4 more elements
An apparatus comprising:
- a control state machine capable of population with control store addresses according to instruction data received by a bus interface;
- a control store memory accessible by the control state machine, the control store memory capable of population with data path instructions indexable by one or more of the control store addresses, wherein the control state machine is configured to identify one of the control store addresses stored and select one of the data path instructions stored in the control store memory with the identified control store address;
- an address calculation device configured to store coefficient addresses and to select one of the coefficient addresses in response to a first portion of the selected data path instruction received from the control store memory;
- and
- a data path device configured to identify a location of at least one filter coefficient stored by the data path device in response to the selected coefficient address received from the address calculation device, wherein the data path device is configured to perform digital signal processing operations on digital data with the at least one filter coefficient according to a second portion of the selected data path instruction received from the control store memory.
2 more elements
Dependencies are inferred from the claim text.