Method and system for testing
AssigneeMarvell Israel (M.I.S.L) Ltd.
InventorsHenri Sznajder, Muhannad Ghanem
Life of this patent
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Abstract
Aspects of the disclosure provide methods and systems for improving test generation using constraint solving problem (CSP) techniques. A test method can include modeling a circuit as logic constraints to correlate outputs of the circuit as logic functions of inputs of the circuit, pre-determining at least a value constraint that specifies a desired output value for an output of the circuit, and solving input values for the inputs to satisfy the logic constraints for the circuit and the value constraint of the output.
Claims19
A method for testing a switch device, comprising:
- receiving, by a processor, logic constraints for modeling switching circuitry of the switch device, the logic constraints being configured to correlate egress ports of the switch device as logic functions of packets input to the switch device;
- receiving, by the processor, a predetermined egress port that constrains a desired egress port from which the input packets are output from the switch device;
- and
- determining, by the processor, at least one set of parameter values including at least ingress port identifications for inputting packets to satisfy the logic constraints and the egress port constraint, wherein the determining includes using a constraint solving problem (CSP) engine to solve a circuit model having an input interface, a first stage, a first-second interface, a second stage, a second-third interface, and an output interface, each of the stages being configured to receive stage inputs from an interface coupled to a previous stage, and provide stage outputs to an interface coupled to a next stage.
A system for verifying a design of a switch device, comprising:
- a plurality of processors executing a module of a directed random constraint solving problem (CSP) engine to generate at least a set of parameter values including at least ingress port identifications for inputting packets to the switch device based on logic constraints that correlate egress ports of the switch device as logic functions of the input packets, and a pre-determined egress port that constraints a desired egress port for the input packets, wherein the CSP engine includes solving a circuit model having an input interface, a first stage, a first-second interface, a second stage, a second-third interface, and an output interface, each of the stages being configured to receive stage inputs from an interface coupled to a previous stage, and provide stage outputs to an interface coupled to a next stage;
- and
- the plurality of processors executing a module of a simulator to simulate inputting at least an input packet having the generated set of parameter values to the design of the switch device, and compute an egress port for the input packet based on the design.
A system for validating a switch device, comprising:
- a plurality of processors executing a module of a directed random constraint solving problem (CSP) engine to generate at least a set of parameter values including at least ingress port identifications for inputting packets to the switch device based on logic constraints that correlate egress ports of the switch device as logic functions of the input packets, and a pre-determined egress port that constrains a desired egress port for the input packets, wherein the CSP engine includes solving a circuit model having an input interface, a first stage, a first-second interface, a second stage, a second-third interface, and an output interface, each of the stages being configured to receive stage inputs from an interface coupled to a previous stage, and provide stage outputs to an interface coupled to a next stage;
- and
- a tester unit configured to input at least one packet having the generated set of parameter values to the switch device and detect an egress port of the switch device from which the packet is output.
Dependencies are inferred from the claim text.